The invention relates to a semiconductor memory device and more particularly to a MOS semiconductor rewritable memory device for performing a storage operation by accumulating an electric charge on the electrically insulating film thereof.
The so-called MOS semiconductor non-volatile memory devices are generally classified into the FAMOS type in which the memory cells have a floating gate and the MNOS type in which the gate insulating films have a double layer structure. In both types each memory cell and the associated circuits thereof have previously been of either the p type or the n type. However, the FAMOS type semiconductor memory device is disadvantageous because the writing in these non-volatile memories is accomplished by applying a high electric field across the pn junction to cause an avalanche breakdown therein to produce hot carriers and these, in turn, traverse the associated electrical insulation barrier by means of an electric field established across the particular gate and the semiconductor substrate with the associated stray capacitance and accumulate on the floating gate.
The formation of a non-volatile memory requires a selection circuit for selecting one memory cell from a matrix as required and a Y gate circuit and an output buffer circuit connected to each of the memory cells. Therefore, in the writing operation, the electric field is applied across a selected one of the memory cells through those two circuits connected thereto. In conventional single-channel FAMOS memory devices, application of a high electric field across the particular memory cell to cause the abovementioned avalanche breakdown is required. Also the Y gate circuit and output buffer circuit MOS transistors have previously been operated in the saturation region. Thus a voltage drop is developed due to the ratio of conductance between the Y gate circuit and the memory cell connected thereto. This results in a disadvantage because in the writing operation a voltage higher than the avalanche voltage for the associated memory cell must be applied to the output buffer circuit.
In addition, a high electric field should be applied across the series connected Y gate circuit, the MOS transistor which selects the readout mode of the output buffer circuit and that buffer circuit. This is one of the great causes of the breakage of the gate oxide film of MOS transistors, the punch-through of the pn junctions therein, the deterioration of components involved etc. which may occur in the writing operation.
Accordingly, it is an object of the present invention to provide a new and improved semiconductor memory device for preforming the writing operation by accumulating an electric charge on the electrically insulating film thereof and in which the power consumption required for the writing operation is decreased.
It is another object of the present invention to provide a new and improved semiconductor memory device for performing the writing and readout operations at high speed.
It is still another object of the present invention to provide a new and improved semiconductor memory device for performing the writing operation with a low voltage.